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Arteris Inc.

09/18/2025 | News release | Distributed by Public on 09/18/2025 18:34

NoC Interconnect IP Improves SoC Power, Performance and Area

Semiconductor Engineering: A Smarter Path To Chiplets Through An Enhanced Multi-Die Solution

With monolithic SoCs reaching their limits, chiplet-based architectures are key to building flexible, high-performance systems. Arteris' multi-die solution combines silicon-proven NoC IP, cache coherency, and automation tools to streamline chiplet integration and accelerate time-to-market. Learn more in the article.

Arteris Inc. published this content on September 18, 2025, and is solely responsible for the information contained herein. Distributed via Public Technologies (PUBT), unedited and unaltered, on September 19, 2025 at 00:35 UTC. If you believe the information included in the content is inaccurate or outdated and requires editing or removal, please contact us at [email protected]

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